Contents
12 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
CHAPTER 4: Resets ................................................................................................................................ 159
1. Overview ...................................................................................................................................... 160
2. Configuration ............................................................................................................................... 161
3. Explanation of Operations ........................................................................................................... 162
3.1. Reset Factors ................................................................................................................. 163
3.2. Resetting Inside the Device ............................................................................................ 166
3.2.1. Resets to Cortex-M4 ........................................................................................ 167
3.2.2. Resets to Peripheral Circuit ............................................................................. 168
3.3. Reset Sequence ............................................................................................................. 169
3.4. Operations After Resets are Cleared .............................................................................. 171
4. Register ....................................................................................................................................... 172
4.1. Reset Factor Register (RST_STR: ReSeT STatus Register) ......................................... 173
CHAPTER 5: Low-voltage Detection ...................................................................................................... 175
1. Overview ...................................................................................................................................... 176
2. Configuration ............................................................................................................................... 177
3. Explanation of Operations ........................................................................................................... 178
4. Setup Procedure Examples ......................................................................................................... 181
5. Registers ..................................................................................................................................... 182
5.1. Low-voltage Detection Voltage Control Register (LVD_CTL) ......................................... 183
5.2. Low-voltage Detection Interrupt Factor Register (LVD_STR) ......................................... 185
5.3. Low-voltage Detection Interrupt Factor Clear Register (LVD_CLR) ............................... 186
5.4. Low-voltage Detection Voltage Protection Register (LVD_RLR) .................................... 187
5.5. Low-voltage Detection Circuit Status Register (LVD_STR2) .......................................... 188
CHAPTER 6: Low Power Consumption Mode ....................................................................................... 189
1. Overview of Low Power Consumption Mode ............................................................................... 190
2. Configuration of CPU Operation Modes ...................................................................................... 195
3. Operations in Standby Modes ..................................................................................................... 202
3.1. Operations in Sleep Modes (High Speed CR Sleep Mode, Main Sleep Mode, PLL Sleep
Mode, Low Speed CR Sleep Mode, Sub Sleep Mode) ............................................... 205
3.2. Operations in Timer Modes (High Speed CR Timer Mode, Main Timer Mode, PLL Timer
Mode, Low Speed CR Timer Mode, Sub Timer Mode) ............................................... 207
3.3. Operations in RTC Mode ................................................................................................ 209
3.4. Operations in Stop Mode ................................................................................................ 212
4. Examples of Procedure for Setting Standby Mode ...................................................................... 215
5. Operations in Deep Standby Modes ............................................................................................ 219
5.1. Operations in Deep Standby RTC Mode ........................................................................ 221
5.2. Operations in Deep Standby Stop Mode ........................................................................ 223
6. Examples of Procedure for Setting Deep Standby Mode............................................................. 225
7. Procedure for Determining Factor for Returning from Deep Standby Mode ................................ 227
8. List of Low Power Consumption Mode Registers ........................................................................ 228
8.1. Standby Mode Control Register (STB_CTL)................................................................... 229
8.2. Sub Clock Supply Control Register (RCK_CTL) ............................................................. 231
8.3. RTC Mode Control Register (PMD_CTL) ....................................................................... 232
8.4. Deep Standby Return Factor Register 1 (WRFSR) ........................................................ 233
8.5. Deep Standby Return Factor Register 2 (WIFSR) .......................................................... 234
8.6. Deep Standby Return Enable Register (WIER) .............................................................. 236
8.7. WKUP Pin Input Level Register (WILVR) ....................................................................... 238
8.8. Deep Standby RAM Retention Register (DSRAMR) ...................................................... 239
8.9. Backup Registers 01 to 16 (BUR01 to BUR16) .............................................................. 240
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