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Cypress FM4 Series - Page 174

Cypress FM4 Series
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CHAPTER 4: Resets
174 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Indicates a reset from the hardware watchdog timer.
If the timer underflows, a reset is issued and HWDT is enabled (HWDT = 1).
bit
Description
0
A hardware watchdog reset has not been issued.
1
A hardware watchdog reset has been issued.
[bit4] SWDT: Software watchdog reset flag
Indicates a reset from the software watchdog timer.
If the timer overflows, a reset is issued and SWDT is enabled (SWDT = 1).
bit
Description
0
A software watchdog reset has not been issued.
1
A software watchdog reset has been issued.
[bit3:2] Reserved: Reserved bits
The read value is undefined.
These bits have no effect when written.
[bit1] INITX: INITX pin input reset flag
Indicates a reset that is externally input.
If a reset is externally input, INITX is enabled (INITX = 1).
bit
Description
0
An INITX pin input reset has not been issued.
1
An INITX pin input reset has been issued.
[bit0] PONR: Power-on reset/low-voltage detection reset flag
Indicates a reset at power-on and when a low-voltage is detected.
If a rising edge of power supply or a low-voltage is detected, a reset is issued and PONR is enabled
(PONR = 1).
bit
Description
0
A power-on reset or low-voltage detection reset has not been issued.
1
A power-on reset or low-voltage detection reset has been issued.
Note:
Determine whether it is a return from deep standby mode or not by deep
standby
return factor registers 1 and 2 (WRFSR and WIFSR).
For details, see "8.5 Deep standby return factor register 1(WRFSR)" and "8.6 Deep
standby return factor register 2(WIFSR)" in Chapter "Low Power Consumption Mode".

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