CHAPTER 5: Low-voltage Detection
184 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
[bit1:0] Reserved: Reserved bits
The read value is undefined.
These bits have no effect when written.
Notes:
− The low-voltage detection interrupt enable bit (LVDIE) must be enabled after 0 was written to the
LVDCL bit of the Low-voltage Detection Interrupt Clear Register (LVD_CLR) to clear the
low-voltage detection interrupt factor bit (LVDIR).
− When the low-voltage detection interrupt enable bit (LVDIE) is not enabled, the Low-voltage
Detection Circuit for detecting a low-voltage interrupt is stopped. Therefore, the low-voltage
detection interrupt factor bit (LVDIR) is not set.
− The Low-voltage Detection Voltage Control Register (LVD_CTL) is write-protected in the initial
state, which makes writing invalid unless write protection mode is released. To write the
LVD_CTL Register, set 0x1ACCE553 to the Low-voltage Detection Voltage Protection Register
(LVD_RLR) to release write protection mode.
− This register is not initialized by the deep standby transition reset.
− In the case of disabling the CPU returning from a deep standby mode due to the low-voltage
detection interrupt, set the WLVDE bit of the Deep Standby Return Enable Register (WIER) and
the low-voltage detection interrupt enable bit (LVDIE) to 0, respectively.
− For the accuracy of detection / release voltage of the Low-voltage Detection Circuit, see Data
Sheet of the product used.
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