Cypress FM4 Series - Page 203

CHAPTER 6: Low Power Consumption Mode
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 203
Table 3-2 Clock Operation States in Timer Mode
Timer Mode
High Speed CR
Timer Mode
Main Timer
Mode
PLL Timer Mode
Low Speed CR
Timer Mode
Sub Timer Mode
High speed CR clock
Operating
Stopped
Main clock
The state changes
according to the
setting of the MOSCE
bit.
Operating
The state changes
according to the
setting of the MOSCE
bit and the PINC bit.
Stopped
Main PLL clock
The state changes according to the
setting of the MOSCE bit and the PLLE
bit.
Operating
Stopped
Low speed CR clock
Operating
Sub clock
The state changes according to the setting of the SOSCE bit.
Operating
USB PLL clock
Stopped
I
2
S PLL clock
Stopped
GDC PLL clock
The state changes according to the setting of the GPINC
*1
and the
GPLLEN
*1
bit.
Stopped
CPU clock
Stopped
AHB bus clock
Stopped
APB0 bus clock
Stopped
APB1 bus clock
Stopped
APB2 bus clock
Stopped
*1: For details of the GPINC bit and GPLLEN bit, refer to GDC Part.
Table 3-3 Clock Operation States in RTC Mode and Stop Mode
RTC Mode
Stop Mode
High speed CR clock
Stopped
Stopped
Main clock
Main PLL clock
Low speed CR clock
Sub clock
Operating
USB PLL clock
Stopped
I
2
S PLL clock
GDC PLL clock
CPU clock
AHB bus clock
APB0 bus clock
APB1 bus clock
APB2 bus clock
MOSCE: MOSCE bit in System Clock Mode Control Register (SCM_CTL)
SOSCE: SOSCE bit in System Clock Mode Control Register (SCM_CTL)
PLLE: PLLE bit in System Clock Mode Control Register (SCM_CTL)
UPLLEN: UPLLEN bit in USB-PLL Control Register 1 (UPCR1)
IPLLEN: IPLLEN bit in I
2
S-PLL Control Register 1 (IPCR1)
APBC1EN: APBC1EN bit in APB1 Prescaler Register (APBC1_PSR)
APBC2EN: APBC2EN bit in APB2 Prescaler Register (APBC2_PSR)
*: For details of the SCM_CTL, APBC1_PSR and APBC2_PSR registers, see Chapter Clock.
For details of the UPCR1 register, refer to chapter USB Clock Generation in Communication Macro Part.
For details of the IPCR1 register, refer to chapter I
2
S Clock Generation in Communication Macro Part.