Cypress FM4 Series - Page 371

CHAPTER 8: Interrupts
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 371
Exc. No.
IRQ no.
Vector Offset
bit
DMAC
DSTC
Exception and Interrupt Source
98
82
0x188
-
-
-
Reserved
99
83
0x18C
0
-
-
DMAC ch.0 interrupt
100
84
0x190
0
-
-
DMAC ch.1 interrupt
101
85
0x194
0
-
-
DMAC ch.2 interrupt
102
86
0x198
0
-
-
DMAC ch.3 interrupt
103
87
0x19C
0
-
-
DMAC ch.4 interrupt
104
88
0x1A0
0
-
-
DMAC ch.5 interrupt
105
89
0x1A4
0
-
-
DMAC ch.6 interrupt
106
90
0x1A8
0
-
-
DMAC ch.7 interrupt
107
91
0x1AC
1
-
-
DSTC ERINT interrupt
0
-
-
DSTC SWINT interrupt
108
92
0x1B0
8
-
-
GDC CommandSequencer interrupt
109
93
0x1B4
8
-
-
GDC BlitEngine interrupt
110
94
0x1B8
8
-
-
GDC DrawingEngine interrupt
111
95
0x1BC
8
-
-
GDC ContentStream0 interrupt
112
96
0x1C0
8
-
-
GDC SafetyStream0 interrupt
113
97
0x1C4
8
-
-
GDC DisplayStream0 interrupt
114
98
0x1C8
8
-
-
GDC Signature0 interrupt
115
99
0x1CC
8
-
-
GDC Display0_Sync0 interrupt
116
100
0x1D0
8
-
-
GDC Display0_Sync1 interrupt
117
101
0x1D4
8
-
-
GDC ContentStream1 interrupt
118
102
0x1D8
8
-
-
GDC SafetyStream1 interrupt
119
103
0x1DC
8
-
-
GDC DisplayStream1 interrupt
120
104
0x1E0
8
-
-
GDC Signature1 interrupt
121
105
0x1E4
8
-
-
GDC Display1_Sync0 interrupt
122
106
0x1E8
8
-
-
GDC Display1_Sync1 interrupt
123
107
0x1EC
8
-
-
GDC CapturePlane0 interrupt
124
108
0x1F0
8
-
-
GDC DisplayPlane0 interrupt
125
109
0x1F4
8
-
-
GDC StorageStream0 interrupt
126
110
0x1F8
8
-
-
GDC Histogram interrupt
127
111
0x1FC
-
-
-
Reserved
128
112
0x200
9
-
*
DSTC-HWINT[125] (GDC HS-SPICNT transmission)
8
-
*
DSTC-HWINT[124] (GDC HS-SPICNT reception)
7
-
*
DSTC-HWINT[123] (I
2
S ch.1 transmission)
6
-
*
DSTC-HWINT[122] (I
2
S ch.1 reception)
5
-
*
DSTC-HWINT[127 ](CAN-FD)
4
-
*
DSTC-HWINT[126] (Programmable CRC)
3
-
-
Reserved
2
-
-
Reserved
1
-
*
DSTC-HWINT[121] (I
2
S ch.0 transmission)
0
-
*
DSTC-HWINT[120] (I
2
S ch.0 reception)
129
113
0x204
-
-
-
Reserved
130
114
0x208
-
-
-
Reserved