CHAPTER 8: Interrupts
386 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Notes:
− If an interrupt signal is selected as a transfer request to the DMAC, the read value of the bit in the
interrupt request batch read register (IRQxxxMON, xxx = 000 to 127) corresponding to that
interrupt signal is 0, regardless of whether the interrupt of that interrupt signal occurs.
− Before modifying the settings of DRQSEL, clear the interrupt request signals from the peripheral
functions related to the settings to be modified.
− The DMA transfer of an interrupt signal not included in the settings of DRQSEL cannot be started
by the hardware start by the DMAC.
− If an interrupt signal is connected to the DMAC according to the settings of DRQSEL, it cannot be
connected to the DSTC.
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