Cypress FM4 Series - Page 435

CHAPTER 8: Interrupts
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 435
[bit0] ODDPKS10
Value
Description
0
There is no conversion of the bit width for the DMA transfer by the DMAC.
1
If the transfer destination address in the DMAC is USB.EP1DT, the bit width of the last
transfer data is converted into one byte.
Notes:
− This register is valid only when on USB ch.1 data is transferred in the IN direction in USB data
size automatic transfer mode in which the DMAC is used.
− This register does not support the DMA transfer by the DSTC.
− When transferring a packet whose number of bytes is an even number, do not write 1 to any of
the ODDPKS14, ODDPKS13, ODDPKS12, ODDPKS11 and ODDPKS10 bits.