Cypress FM4 Series - Page 496

CHAPTER 10: DMAC
496 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
bit28:23
Function
111011
IDREQ[27]
111100
IDREQ[28]
111101
IDREQ[29]
111110
IDREQ[30]
111111
IDREQ[31]
Setting other than
above
Setting is prohibited.
[bit22:20] Reserved: Reserved bits
"0" is read out from these bits.
When writing these bits, set them to "0".
[bit19:16] BC[3:0] : Block Count
These bits specify the number of blocks for Block/Burst transfer.
When the transfer mode is set to Demand transfer, set BC[3:0] to "0000".
Set the value "BC[3:0]=Number of blocks - 1". The maximum allowed number of blocks is 16.
The value of these bits can be read during a transfer. Normally, as one transfer source access or one
transfer destination access is completed successfully, BC[3:0] is decreased by 1.
In the case of DMACB:RC=1, the value set when the transfer started is reloaded upon the completion of
the transfer.
In the case of DMACB:RC=0, the value is set to "0" upon successful completion of the transfer, while the
value remains the same value as set during the transfer suspension upon unsuccessful completion of the
transfer.
bit19:16
Function
Number of transfer blocks (Initial value : 0x0)
[bit15:0] TC[15:0] : Transfer Count
These bits specify the number of transfers for Block/Burst/Demand transfer.
Set the value "TC = Number of transfers - 1". The maximum allowed number of transfers is 65536.
The value of these bits can be read during a transfer. Normally, as the transfer of one block is completed,
TC is decreased by 1.
In the case of DMACB:RC=1, the value set when the transfer started is reloaded upon the completion of
the transfer.
In the case of DMACB:RC=0, the value is set to "0" upon successful completion of the transfer, while the
value remains the same value as set during the transfer suspension upon unsuccessful completion of the
transfer.
bit15:0
Function
Number of transfers (Initial value : 0x0000)