EasyManua.ls Logo

Cypress FM4 Series - Page 60

Cypress FM4 Series
1102 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
CHAPTER 2-1: Clock
60 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Notes:
This register is not initialized by software reset.
When you change the clock mode, you should set the enable bit to transition for desired clock
oscillation. Then, you can change the clock switch control bits (SCM_CTL:RCS[2:0]).
When RTCE bit (PMD_CTL:RTCE) is 1, it becomes a sub clock oscillation enable state
regardless of the SOSCE bit and SORDY bit values.
Writing "1" to RTCE bit (PMD_CTL:RTCE) is enabled only when SORDY bit is 1.
RTCE bit (PMD_CTL:RTCE) does not exist in the products that do not have RTC mode and deep
standby RTC mode. See Table 1-1 in the Chapter Low Power Consumption Mode.
First of all, after the power supply is turned on, it is required to set the register of VBAT RTC for
enabling the sub-clock oscillation. For the sub-clock oscillation enable, see Figure 4-2.

Table of Contents

Related product manuals