CHAPTER 12: I/O Port
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 601
Notes:
− The "x" of DDRx is a wildcard. DDRx indicates DDR0, DDR1, DDR2, etc.
− The "x" of Px0 and PxF is a wildcard. Px0 indicates P00, P10, P20, etc. PxF indicates P0F, P1F,
P2F, etc.
− One register allows setting the input/output direction of 16 ports from PxF to Px0.
− Each bit in the register sets each pin individually. There is a one-to-one correspondence between
bit assignment and the order of pins. For example, bit15 of DDR0 sets P0F, bit14 of DDR0 sets
P0E, and bit0 of DDR0 sets P00.
− If the output RTO of a multifunction timer is selected, in an emergency stop due to DTTIX signal,
a DDR controls pin status. For more information, see the chapter "Multifunction Timer" in Timer
Part.
− For a pin which is not available in your product, must write initial value to the bit, and the read
value is undefined.
− The setting of P46 to P49 with this register is invalid. Use port I/O direction setting register
(VBDDR) of VBAT to set these pins. For details of VBAT, see VBAT Domain.
− DDRx register is not initialized by deep standby transition reset.
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