Cypress FM4 Series - Page 611

CHAPTER 12: I/O Port
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 611
[bit3] Reserved: Reserved bit
0 is read out from this bit.
When writing this bit, set it to 0.
[bit2:1] CROUTE: Internal high-speed CR Oscillation Output Function Select bit
Selects internal high-speed CR oscillation output.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce internal high-speed CR oscillation output. [Initial value]
01
Uses CROUT_0 at the internal high-speed CR oscillation output pin.
10
Uses CROUT_1 at the internal high-speed CR oscillation output pin.
11
Uses CROUT_2 at the internal high-speed CR oscillation output pin.
[bit0] NMIS: NMIX Function Select bit
Selects a function for the NMIX pin.
bit
Description
Reading
Reads out the register value.
Writing
0
Does not use the NMIX pin. [Initial value]
1
Uses the NMIX pin.
Notes:
− This register is not initialized by deep standby transition reset.
− TRC2E and TRC3E bit does not exist in TYPE1-M4 and TYPE2-M4 products.
− When the I/O port which is mapped to NMI input pin is changed to GPIO or other peripheral
function from NMI (write EPFR00.NMIS = 1), input level of the I/O port should be held high level,
and change the I/O port. Internal NMI signal is tied to high level in case of the I/O port is selected
to GPIO or other peripheral function. Therefore, when input level of the I/O port is low, to change
the I/O port from GPIO or other peripheral function to NMI, is caused to change of internal NMI
signal high to low. So, falling edge will be detected, NMI request occurred.