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Cypress FM4 Series - Page 661

Cypress FM4 Series
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CHAPTER 12: I/O Port
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 661
[bit2] UEA01E: UEA01E Output Select bit
Selects output for external bus address01.
bit
Description
Reading
Reads out the register value.
Writing
0
Does not produce output for user external bus MAD01. [Initial value]
1
Produces output for user external bus MAD01.
[bit1] UECS0E: UECS0E Output Select bit
Selects output for external bus CS0.
bit
Description
Reading
Reads out the register value.
Writing
0
Does not produce output for user external bus MCSX0. [Initial value]
1
Produces output for user external bus MCSX0.
[bit0] UEALEE: UEALEE Output Select bit
Selects output for external bus ALE signal.
bit
Description
Reading
Reads out the register value.
Writing
0
Does not produce output for user external bus MALE. [Initial value]
1
Produces output for user external bus MALE.
Notes:
I/O selection of the external bus data[15:8] can be controlled collectively with EPFR10.bit1.
I/O selection of the external bus data[15:8] can be controlled by each bit also with
EPFR11.bit[24:17].
EPFR10.bit1 setting has the higher priority than EPFR11.bit[24:17] setting.
To control I/O selection by setting EPFR11.bit[24:17], it is necessary to set EPFR10.bit1=0.
I/O selection of the external bus address[7:1], MCSX0, and external bus data[7:0] can be
controlled collectively with EPFR10.bit0.
I/O selection of the external bus address[7:1], MCSX0, and external bus data[7:0] can be
controlled by each bit also with EPFR11.bit[16:1].
EPFR10.bit0 setting has the higher priority than EPFR11.bit[16:1] setting.
To control I/O selection by setting EPFR11.bit[16:1], it is necessary to set EPFR10.bit0=0.
This register is not initialized by deep standby transition reset.

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