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Cypress FM4 Series - Page 707

Cypress FM4 Series
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CHAPTER 12: I/O Port
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 707
[bit3:2] I2SM4_MCLK0E: I2SMCLK0 Output Select bits
Selects output for I2SMCLK0.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of I2S ch.0 I2SMCLK. [Initial value]
01
Uses I2SMCLK0_0 at the output pin of I2S ch.0 I2SMCLK.
10
Setting is prohibited.
11
Setting is prohibited.
[bit1:0] I2SM4_MCLK0S: I2SMCLK0 Input Select bits
Selects input for I2SMCLK0.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce input of I2S ch.0 I2SMCLK. [Initial value]
01
Uses I2SMCLK0_0 at the input pin of I2S ch.0 I2SMCLK.
10
Setting is prohibited.
11
Setting is prohibited.
Notes:
This register does not exist in TYPE1-M4, TYPE2-M4, TYPE5-M4, TYPE6-M4 products.
This register is not initialized by deep standby transition reset.

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