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Cypress FM4 Series - Page 711

Cypress FM4 Series
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CHAPTER 12: I/O Port
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 711
[bit3:2] Q_CS0E: Q_CS0 (GE_SPCSX0) Output Select bits
Selects output for Q_CS0 (GE_SPCSX0). TYPE4-M4 products signal in parentheses are eligible.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of Hi-Speed SPI controller Q_CS0. [Initial value]
01
Uses Q_CS0_0 at the output pin of Hi-Speed SPI controller Q_CS0.
10
Setting is prohibited.
11
Setting is prohibited.
[bit1:0] Q_SCKB: Q_SCK (GE_SPCK) Input/Output Select bits
Selects input/output for Q_SCK. TYPE4-M4 products signal in parentheses are eligible.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce input/output of Hi-Speed SPI controller Q_SCK. [Initial value]
01
Uses Q_SCK_0 at the input/output pin of Hi-Speed SPI controller Q_SCK.
10
Setting is prohibited.
11
Setting is prohibited.
Notes:
This register does not exist in TYPE1-M4, TYPE2-M4, TYPE5-M4, TYPE6-M4 products.
This register is not initialized by deep standby transition reset.

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