Cypress FM4 Series - Page 76

CHAPTER 2-1: Clock
76 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
[bit0] MCSC: Main clock oscillation stabilization wait completion interrupt factor clear
bit
bit
Description
When 0 is
written
The main clock oscillation stabilization wait completion interrupt factor is not affected by the
written value.
When 1 is
written
Clears the main clock oscillation stabilization wait completion interrupt factor.
When read
The fixed value 0 is read.
Note:
− When this register is cleared, each interrupt status bit (FCSI, PCSI, SCSI, MCSI) of the INT_STR
register is also cleared.