CHAPTER 14: External Bus Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 831
[bit20]SDCKE: SDRAM CKE
On detecting the writing to this register, outputs the value set in this bit to MADCKE.
[bit19] SDCS: SDRAM Chip Select
On detecting the writing to this register, outputs the value set in this bit to MCSX[8].
[bit18] SDRAS: SDRAM RAS
On detecting the writing to this register, outputs the value set in this bit to MRASX.
[bit17] SDCAS: SDRAM CAS
On detecting the writing to this register, outputs the value set in this bit to MCASX.
[bit16] SDWE: SDRAM Write Enable
On detecting the writing to this register, outputs the value set in this bit to MSDWEX.
[bit15:0] SDAD: SDRAM ADress
On detecting the writing to this register, outputs the value set in this bit to MAD[15:0].
Notes:
− Set APBC2 bit of APB2 Prescaler Register(APBC2_PSR) so that the frequency of PCLK2
becomes the frequency of MSDCLK or below, when writing this register. SDRAM Command
Register cannot set, when the division ratio of MSDCLK is 1/9 to 1/16 by using MDIV bit of
Division Clock Register (DCLKR).
− For the details of APB2 Prescaler Register, see 5.6. APB2 Prescaler Register of Chapter Clock.
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