Cypress FM4 Series - Page 871

CHAPTER 15: SD Card Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 871
Bit
Attribute
Description
63-56
Rsvd
Reserved
55-48
HwInit
Clock Multiplier
This field indicates the multiplier to be used by the clock generator in Programmable
Clock Mode.
*: This Family does not use this field.
Bit value
Clock multiplier
0x00
Clock Multiplier is NOT Supported
0x01
Clock Multiplier M = 2
0x02
Clock Multiplier M = 3
...
0xFF
Clock Multiplier M = 26
47-46
HwInit
Re-Tuning Modes
This field selects a Re-Tuning Mode.
*: This Family does not use this field.
Bit value
Clock multiplier
0b00
Re-Tuning Mode 1
0b01
Re-Tuning Mode 2
0b10
Re-Tuning Mode 3
0b11
Reserved
45
HwInit
Use Tuning for SDR50
This bit is set to "1" if the Host requires tuning to operate SDR50.
The value of the CR_TUNSDR50_I pin is reflected in this bit.
1: SDR50 (tuning required)
0: SDR50 (tuning not required)
*: This Family does not use this field.
44
Rsvd
Reserved
43-40
HwInit
Timer Count for Re-Tuning
This field indicates the value of the Re-Tuning Timer.
*: This Family does not use this field.
Bit value
Value of Re-Tuning Timer
0x0
Re-Tuning Timer disabled
0x1
1 second
0x2
2 seconds
0x3
4 seconds
0x4
8 seconds
...
N
2(n-1) seconds
...
0xB
1024 seconds
0xC to 0xE
Reserved
0xF
Get information from other source
39
Rsvd
Reserved