Cypress FM4 Series - Page 882

CHAPTER 15: SD Card Interface
882 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Bit
Attribute
Description
18-16
RW
Clock Pin Select
This field selects a clock pin output.
Settings:
0b000: Clock pins are disabled.
0b001: CLK[1](SD_CLK) is selected.
0b010: CLK[2](SD_CLK) is selected.
...: ...
"0b111": CLK[7](SD_CLK) is selected.
Set/Reset
Condition
Set
1 Write
Reset (0)
System reset
Software Reset For All
0 Write
15
Rsvd
Reserved
14-08
HwInit
Bus Width Preset
Each bit in this field indicates the bus width of an embedded device.
Settings::
0: 4-bit bus width mode
1: 8-bit bus width mode
07-06
Rsvd
Reserved
05-04
HwInit
Number of Interrupt Input Pins
This field indicates the number of interrupt input pins supported.
Settings:
0b00: No interrupt input pin is supported.
0b01: INTA is supported.
0b10: INTA and INTB are supported.
0b11: INTA, INTB and INTC are supported.
03
Rsvd
Reserved
02-00
HwInit
Number of Clock Pins
This field indicates the number of clock pins supported.
Settings:
0b000: The shared bus is not supported.
0b001: 1 SDCLK pin is supported.
0b010: 2 SDCLK pins are supported.
...: ...
0b111: 7 SDCLK pins are supported.