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Cypress FM4 Series - Page 90

Cypress FM4 Series
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CHAPTER 2-2: Clock Gating
90 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Clock gating of peripheral functions
1. Gating setting of peripheral clocks
For the peripheral clock control registers (CKEN0, CKEN1, and CKEN2), change the bit corresponding to
the peripheral function for which the clock supply is to be stopped to 0.
After gating the clock to the peripheral function to which the clock gating is instructed, the peripheral clock
control registers (CKEN0, CKEN1, and CKEN2) updates the register value to the written value.
2. Reset control to peripheral functions whose peripheral clocks are gated
For the peripheral functions whose clocks are gated, to reset their internal state, execute the reset control
of each peripheral function according to the following procedures.
Reset enabled :
Write 1 to the target bits of peripheral function reset control registers (MRST0, MRST1, and MRST2).
Reset released:
Write 0 to the target bits of peripheral function reset control registers (MRST0, MRST1, and MRST2).
Resupplying clocks to peripheral functions
1. Reset control of peripheral functions which restart clock supply to peripheral functions
For the peripheral functions which gate the peripheral clocks, execute the reset control to each peripheral
function by using peripheral function reset control registers (MRST0, MRST1, and MRST2) before
restarting their operation. The procedures are the same as the above-mentioned procedures of reset
control immediately after peripheral clocks gated.
2. Supply settings of peripheral clocks
For the peripheral clock control registers (CKEN0, CKEN1, and CKEN2), change the settings of bit
corresponding to the peripheral function for which the clock is to be resupplied.
At this time, do not set the bit where the peripheral function is not provided and the bit whose bus clock
has been gated to the values other than the initial value The reason is that the read value cannot coincide
with the written value not to get out of the processing loop at the register set value confirmation in the
following Item 3.
3. Confirmation of set values of peripheral clock control registers
At the step where the clock setting change is reflected to the peripheral function whose settings are
changed, the peripheral clock control registers (CKEN0, CKEN1, and CKEN2) updates the register value
to the written values.
Be sure to start the access to the peripheral function after executing the setting change of the
above-mentioned Item 2, reading the register, and then confirming the agreement with the written value
because the access to the peripheral functions is invalid at clock gating.

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