CHAPTER 15: SD Card Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 909
(1) Prepare the ADMA descriptor table in the system memory.
(2) Set the descriptor address of the ADMA in the ADMA System Address Register.
(3) Set the Boot Mode Enable for MMC bit in the MMC/eSD Control Register to 1.
In addition, to enable boot acknowledge reception, set the Boot Ack Enable for MMC bit to 1; to complete
the boot operation automatically according to the end attribute in the ADMA descriptor table, set the boot
auto abort enable for MMC bit to 1.
Moreover, if a boot operation is executed with the Boot Auto Abort Enable for MMC bit set to 0, the data
transfer becomes an infinite block read transfer. Setting the Boot Mode Enable for MMC bit to 0 can end
the transfer.
(4) Set the Data Timeout Counter Value bits to the biggest value among tBA, tBD and NAC of timing
specifications.
(5) Set the DMA Select bits to 0b10 (32-bit address ADMA2 is selected).
Set the Extended Data Transfer Width and the Data Transfer Width bit according to the type of
communication.
In addition, this macro does not use the High Speed Enable bit in transfer control. (The High Speed
Enable bit in this macro is meaningless.)
(6) Set the Multi / Single Block Select bit to 1 (Multiple Block).
Set the Data Transfer Direction Select bit to 1 (Read).
Set the Auto Command Enable bits to 0b00 (Auto Command Disabled).
Set the Block Count Enable bit to 0 (Disable).
Set the DMA Enable bit to 1 (DMA Data transfer).
(7) Set the Data Present Select bit to 1 (Data Present). Set all the remaining bits in the Command Register
to 0.
A write access to the upper bits in the Command Register causes the boot operation to start.
(8) Wait for the interrupt to determine whether the boot operation has been completed.
(9) If the ADMA Error Interrupt, the Data Error Interrupt or the Boot Acknowledge Error Interrupt is
generated, proceed to (11).
If no error interrupt is generated, but both Command Complete Interrupt and Transfer Complete Interrupt
are generated, proceed to (10).
In addition, the generation of the Command Complete Interrupt and that of Transfer Complete Interrupt
have no relation. (The sequence of generation of these two interrupts varies depending on the conditions
of the system.)
(10) Clear the Command Complete bit and the Transfer Complete Interrupt Status bit to 0.
(11) Clear the error interrupt status bit corresponding to the interrupt generated to 0.
(12) Set the Boot Mode Enable bit in the MMC/eSD Control Register to 0 to abort the boot operation.
After aborting the boot operation, execute a software reset.
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