CHAPTER 19: Programmable CRC
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 939
Each time CRC computing is completed, a transfer request is issued and transfer operations are
repeatedly performed until transfer of all input data completes. When transfer of the last input data
completes, DSTC resets the DRQMSK[n] register and masks the following transfer requests from the
programmable CRC.
#7 CPU performs the next processing after receiving a transfer completion notification from DSTC.
#8 Clear the transfer completion notification (HWINT[n] interrupt) from DSTC.
#9 and #10 Check if CRC computing for the last input data transferred from DSTC is completed by
reading LOCK of the PRGCRC_CFG register from CPU. After checking, go to the next step.
#11 Read the PRGCRC_RD register to acquire the computing results.
#12 Write CDEN="0" for the PRGCRC_CFG register and negate the transfer request signal.
#13 Write to the DRQMSKCLR[n] register of DSTC and clear the DRQMSK[n] register.
#14 Finish controlling for input data transfer from DSTC.
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