CHAPTER 5: Low-voltage Detection
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 179
Operations of Low-voltage Detection Interrupt Circuit
Operations
The Low-voltage Detection Interrupt Circuit monitors the power supply voltage (VCC) and generates an
interrupt signal when the power supply voltage falls below the specified voltage.
An interrupt request is enabled when 1 is set to the LVDIE bit of the Low-voltage Detection Voltage
Control Register. The initial value is set to Not Enable. The interrupt detection voltage can be set by the
SVHI bit of the Low-voltage Detection Voltage Control Register (LVD_CTL). When an interrupt request is
enabled and the interrupt detection voltage is specified, the status flag LVDIRDY bit of the Low-voltage
Detection Circuit Status Register (LVD_STR2) is set to 1 and this circuit starts monitoring the power
supply voltage after the stabilization wait time of the Low-voltage Detection Circuit has lapsed.
This circuit is available in standby modes (Sleep mode, Timer mode, RTC mode, Stop mode) and deep
standby modes (Deep standby RTC mode, Deep standby Stop mode). It is also applicable when the CPU
returns from those modes.
Low-voltage detection interrupt request
When the power supply voltage (VCC) falls below the specified voltage while a low-voltage detection
interrupt is effective, 1 is set to the LVDIR bit of the Low-voltage Detection Interrupt Factor Register
(LVD_STR) to generate an interrupt request signal.
An interrupt request can be checked by reading the LVDIR bit.
Canceling a low-voltage detection interrupt request
To cancel a low-voltage detection interrupt request, write 0 to the LVDCL bit of the Low-voltage Detection
Interrupt Factor Clear Register (LVD_CLR). This clears a low-voltage detection interrupt factor and
cancels a low-voltage detection interrupt request.
Even when the power supply voltage is below the specified detection voltage, an interrupt request is
canceled when 0 is written to the LVDCL bit.
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