CHAPTER 5: Low-voltage Detection
180 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Notes:
− This circuit does not conduct monitoring the power supply voltage if PCLK2 is gated by Timer
mode, RTC mode, Stop mode, Deep standby RTC mode, Deep standby Stop mode, or APB2
Prescaler Register (APBC2_PSR) while waiting for the stabilization of the Low-voltage Detection
Circuit. After checking that the Low-voltage detection interrupt status flag (LVDIRDY) of
Low-voltage Detection Circuit Status Register (LVD_STR2) is set to 1, change to the desired
mode.
− For the hysteresis of detection / release voltage of the Low-voltage Detection Circuit, see Data
Sheet of the product used.
To Next Page
Loading...
