CHAPTER 7-2: VBAT Domain(A)
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 253
Circuit Connected to Interface Circuit
The major circuits in the VBAT Domain are the RTC, the VBAT port and the buffer register.
The VBAT Domain executes the save operation or the recall operation on the buffer and registers of each
circuit together.
(For details of the function of the WTCR20 Register in the following explanation, see "7.5 Control Register
(WTCR20)" in chapter RTC Count Block in Timer Part.
CREAD/CWRITE
Performs a bulk save/recall operation for the registers shown in Table 2-6 List of Registers Transferred by
CWRITE/CREAD, which are included in the RTC circuit.
Table 2-6 List of Registers Transferred by CWRITE/CREAD
For the function of each register, see [RTCCAL], which stands for Chapter RTC Count Block in Timer
Part.
The interface circuit type for registers No.1 to No.17 and No. 19 is type 2.
For WTCR10 register of No. 18, this register has different types of bits of interface circuit. Bit:0 ST is
type2. Bit:2 RUN is type4. Except bit0,2 of this register bits are normal register bits that are not affected
by VBAT domain.
A save operation is started if 1 is written to RTC setting save control bit (CWRITE) in the WTCR20
Register. This save operation is called a CWRITE operation.
A recall operation is started if 1 is written to RTC setting recall control bit (CREAD) in the WTCR20
Register. This recall operation is called a CREAD operation.
The subclock is used as the transfer clock.
The RTC transfers 1 byte of data for one transfer clock.
In one CREAD/CWRITE operation, the RTC transfers data of registers in sequence from No.1 to No.19
shown in Table 2-6.
Since the registers are 19 bytes in total, the data transfer ends as 19 transfer clocks elapse.
Special notes are provided for the save operation and recall operation. See the notes in 3. Explanation of
RTC Count Block Operation and Examples of Setting Procedures in RTC Count Block of Timer Part.
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