CHAPTER 14: External Bus Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 777
Table 3-7 Automatic Wait Setup List (SDRAM)
Number of CAS latency cycles
1 to 3 cycles
(CL+1) Cycle
Number of latency cycles between
RASs
1 to 8 cycles
(TRC+1) Cycle
Number of cycles in precharge period
1 to 4 cycles
(TRP+1) Cycles
Number of latency cycles between RAS
and CAS
1 to 2 cycles
(TRCD+1) Cycles
Number of cycles in minimum active
period of Row
1 to 8 cycles
(TRAS+1) Cycle
Number of latency cycles of the
command succeeding to refresh
1 to 8 cycles
(TREF+1) Cycles
Number of latency cycles from write to
precharge
1 to 4 cycles
(TDPL+1) Cycles
*: Number of cycles is counted based on MSDCLK.
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