Cypress FM4 Series - Page 807

CHAPTER 14: External Bus Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 807
[bit1:0] WDTH: Data Width
These bits specify the data bit width of a device to be connected.
bit1
bit0
Description
TYPE1-M4, TYPE4-M4, TYPE5-M4,
TYPE6-M4 products
TYPE3-M4 products
0
0
8 bits [Initial value]
8 bits [Initial value]
0
1
16 bits
16 bits
1
0
Setting is prohibited.
32 bits
1
1
Setting is prohibited.
Setting is prohibited.
Note:
− The initial value of these bits becomes 01 only for MODE4 register.
Notes:
− If a disabled value is written to the WDTH bit, the operation of the external bus interface is not
guaranteed.
− The NAND Flash memory mode may not be used by some of products as the NAND Flash
control pin is not output. See the data sheets of products used for the details.
− Always write 0 to write to the reserved bit. The read value from the reserved bit is undefined.