Cypress FM4 Series - Page 811

CHAPTER 14: External Bus Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 811
 MPXDOFF bit: Address Output Availability Setup for Data Line
This bit is used to select the address output availability for the data line in multiplex mode.
In case of MPXDOFF = 0
RD
Address
0 1 2 3 4 5 6 7 8 9
10
11 12
MADATA[31:0]
MOEX
MWEX
MDQM[0]
Read access cycle
MCSX
MALE
WD
Write access cycle
Address
Address
MAD[24:16]
Address
Address
MAD[15:0]
Address
13
ALC=2
ALES=1
ALEW=0
RACC=1
WACC=2
RADC=1
RIDLC=0
WIDLC=0
WWEC=0WADC=0
ALC=2
ALES=1
ALEW=1
MCLK
(MCLKOUT)
Address is output to the MADATA line during ALC period.
In case of MPXDOFF = 1
RD
0 1 2 3 4 5 6 7 8 9
10
11 12
MADATA[31:0]
MOEX
MWEX
MDQM[0]
Read access cycle
MCSX
MALE
WD
Write access cycle
Address
MAD[24:16]
Address
Address
MAD[15:0]
Address
13
ALC=2
ALES=1
ALEW=0
RACC=1
WACC=2
RADC=1
RIDLC=0
WIDLC=0
WWEC=0WADC=0
ALC=2
ALES=1
ALEW=1
MCLK
(MCLKOUT)
Address is not output to the MADATA line during ALC period.
In the multiplex mode , to use ALE signal only or to use the ALE signal but use the MAD for the address
pins, it can be used by setting MPXDOFF=1.