CHAPTER 19: Programmable CRC
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 947
[bit23:22] SZ[1:0] (Input data size)
8-bit input data size is selected.
16-bit input data size is selected.
24-bit input data size is selected.
32-bit input data size is selected.
Reads the register setting value.
Specifies input data size to write to the PRGCRC_WR register. Refer to the description section of the
PRGCRC_WR register for relationship between the specified value for SZ[1:0] and input data format .
Write access to this register is not allowed when CRC computing is performed
(PRGCRC_CFG.LOCK="1").
[bit24] CIRQ (PRGCRC Interrupt request)
Indicates that the computing has not been completed when CRC computing is started.
Indicates that the computing has been completed when CRC computing is started.
CIRQ is a register dedicated for read which notify the completion of CRC computing. "1" is set to this
register when the started CRC computing is completed. By writing "1" to the CIRQCLR register, this
register is cleared to "0".
In case that the host CPU determines the completion of computing using the read value of this register,
be sure to clear this register to "0" by writing "1" to the CIRQCLR register each time computing is
completed.
[bit25] CIEN(PRGCRC Interrupt request enable)
Prohibits the interrupt notification in the case of CIRQ="1".
Allows the interrupt notification in the case of CIRQ="1".
Reads the register setting value.
With the setting of the register CIEN value, the interrupt notification of computing completion from
programmable CRC can be issued using the CIRQ register value. In case of CIEN="1" and CIRQ="1", the
interrupt signal of computing completion is asserted. Write access to this register is not allowed when
CRC computing is performed (PRGCRC_CFG.LOCK="1").
[bit26] CDEN(PRGCRC DMA request enable)
To Next Page
Loading...
