Section number Title Page
23.4.2 Channel Initialization and Startup................................................................................................................361
23.4.3 Dual-Address Data Transfer Mode..............................................................................................................363
23.4.4 Advanced Data Transfer Controls: Auto-Alignment...................................................................................364
23.4.5 Termination..................................................................................................................................................365
Chapter 24
Multipurpose Clock Generator (MCG)
24.1 Introduction...................................................................................................................................................................367
24.1.1 Features........................................................................................................................................................367
24.1.2 Modes of Operation.....................................................................................................................................370
24.2 External Signal Description..........................................................................................................................................371
24.3 Memory Map/Register Definition.................................................................................................................................371
24.3.1 MCG Control 1 Register (MCG_C1)...........................................................................................................372
24.3.2 MCG Control 2 Register (MCG_C2)...........................................................................................................373
24.3.3 MCG Control 3 Register (MCG_C3)...........................................................................................................374
24.3.4 MCG Control 4 Register (MCG_C4)...........................................................................................................374
24.3.5 MCG Control 5 Register (MCG_C5)...........................................................................................................376
24.3.6 MCG Control 6 Register (MCG_C6)...........................................................................................................377
24.3.7 MCG Status Register (MCG_S)..................................................................................................................378
24.3.8 MCG Status and Control Register (MCG_SC)............................................................................................380
24.3.9 MCG Auto Trim Compare Value High Register (MCG_ATCVH)............................................................381
24.3.10 MCG Auto Trim Compare Value Low Register (MCG_ATCVL)..............................................................381
24.3.11 MCG Control 7 Register (MCG_C7)...........................................................................................................382
24.3.12 MCG Control 8 Register (MCG_C8)...........................................................................................................382
24.3.13 MCG Control 9 Register (MCG_C9)...........................................................................................................383
24.3.14 MCG Control 10 Register (MCG_C10).......................................................................................................383
24.4 Functional Description..................................................................................................................................................384
24.4.1 MCG mode state diagram............................................................................................................................384
24.4.2 Low Power Bit Usage..................................................................................................................................388
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 15