NXP Semiconductors KL25 Series - Page 178

PORT memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4004_9020 Pin Control Register n (PORTA_PCR8) 32 R/W See section 11.5.1/183
4004_9024 Pin Control Register n (PORTA_PCR9) 32 R/W See section 11.5.1/183
4004_9028 Pin Control Register n (PORTA_PCR10) 32 R/W See section 11.5.1/183
4004_902C Pin Control Register n (PORTA_PCR11) 32 R/W See section 11.5.1/183
4004_9030 Pin Control Register n (PORTA_PCR12) 32 R/W See section 11.5.1/183
4004_9034 Pin Control Register n (PORTA_PCR13) 32 R/W See section 11.5.1/183
4004_9038 Pin Control Register n (PORTA_PCR14) 32 R/W See section 11.5.1/183
4004_903C Pin Control Register n (PORTA_PCR15) 32 R/W See section 11.5.1/183
4004_9040 Pin Control Register n (PORTA_PCR16) 32 R/W See section 11.5.1/183
4004_9044 Pin Control Register n (PORTA_PCR17) 32 R/W See section 11.5.1/183
4004_9048 Pin Control Register n (PORTA_PCR18) 32 R/W See section 11.5.1/183
4004_904C Pin Control Register n (PORTA_PCR19) 32 R/W See section 11.5.1/183
4004_9050 Pin Control Register n (PORTA_PCR20) 32 R/W See section 11.5.1/183
4004_9054 Pin Control Register n (PORTA_PCR21) 32 R/W See section 11.5.1/183
4004_9058 Pin Control Register n (PORTA_PCR22) 32 R/W See section 11.5.1/183
4004_905C Pin Control Register n (PORTA_PCR23) 32 R/W See section 11.5.1/183
4004_9060 Pin Control Register n (PORTA_PCR24) 32 R/W See section 11.5.1/183
4004_9064 Pin Control Register n (PORTA_PCR25) 32 R/W See section 11.5.1/183
4004_9068 Pin Control Register n (PORTA_PCR26) 32 R/W See section 11.5.1/183
4004_906C Pin Control Register n (PORTA_PCR27) 32 R/W See section 11.5.1/183
4004_9070 Pin Control Register n (PORTA_PCR28) 32 R/W See section 11.5.1/183
4004_9074 Pin Control Register n (PORTA_PCR29) 32 R/W See section 11.5.1/183
4004_9078 Pin Control Register n (PORTA_PCR30) 32 R/W See section 11.5.1/183
4004_907C Pin Control Register n (PORTA_PCR31) 32 R/W See section 11.5.1/183
4004_9080 Global Pin Control Low Register (PORTA_GPCLR) 32
W
(always
reads 0)
0000_0000h 11.5.2/185
4004_9084 Global Pin Control High Register (PORTA_GPCHR) 32
W
(always
reads 0)
0000_0000h 11.5.3/186
4004_90A0 Interrupt Status Flag Register (PORTA_ISFR) 32 w1c 0000_0000h 11.5.4/186
4004_A000 Pin Control Register n (PORTB_PCR0) 32 R/W See section 11.5.1/183
4004_A004 Pin Control Register n (PORTB_PCR1) 32 R/W See section 11.5.1/183
4004_A008 Pin Control Register n (PORTB_PCR2) 32 R/W See section 11.5.1/183
4004_A00C Pin Control Register n (PORTB_PCR3) 32 R/W See section 11.5.1/183
4004_A010 Pin Control Register n (PORTB_PCR4) 32 R/W See section 11.5.1/183
4004_A014 Pin Control Register n (PORTB_PCR5) 32 R/W See section 11.5.1/183
4004_A018 Pin Control Register n (PORTB_PCR6) 32 R/W See section 11.5.1/183
4004_A01C Pin Control Register n (PORTB_PCR7) 32 R/W See section 11.5.1/183
Table continues on the next page...
Memory map and register definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
178 Freescale Semiconductor, Inc.