NXP Semiconductors KL25 Series - Page 32

Section number Title Page
42.1.2 Modes of operation......................................................................................................................................785
42.1.3 Block diagram..............................................................................................................................................786
42.2 External signal description............................................................................................................................................787
42.2.1 TSI[15:0]......................................................................................................................................................787
42.3 Register definition.........................................................................................................................................................787
42.3.1 TSI General Control and Status Register (TSIx_GENCS)..........................................................................787
42.3.2 TSI DATA Register (TSIx_DATA).............................................................................................................792
42.3.3 TSI Threshold Register (TSIx_TSHD)........................................................................................................793
42.4 Functional description...................................................................................................................................................793
42.4.1 Capacitance measurement............................................................................................................................794
42.4.2 TSI measurement result...............................................................................................................................797
42.4.3 Enable TSI module.......................................................................................................................................797
42.4.4 Software and hardware trigger.....................................................................................................................797
42.4.5 Scan times....................................................................................................................................................798
42.4.6 Clock setting................................................................................................................................................798
42.4.7 Reference voltage.........................................................................................................................................798
42.4.8 Current source..............................................................................................................................................799
42.4.9 End of scan...................................................................................................................................................799
42.4.10 Out-of-range interrupt..................................................................................................................................799
42.4.11 Wake up MCU from low power modes.......................................................................................................800
42.4.12 DMA function support.................................................................................................................................800
42.4.13 Noise detection mode...................................................................................................................................800
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
32 Freescale Semiconductor, Inc.