CHAPTER 7-2: VBAT Domain(A)
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 257
BWRITE/BREAD
The backup registers refer to the 32-byte register area from BREG00 to BREG1F.
For the functions of the backup registers, see "2.5 Backup Registers".
The interface circuit type for the backup registers is type 3.
A save operation is started if 1 is written to Back up register save control bit (BWRITE) in the WTCR20
Register. This save operation is called a BWRITE operation.
A recall operation is started if 1 is written to Back up register recall control bit (BREAD) in the WTCR20
Register. This recall operation is called a BREAD operation.
The transfer clock is created by dividing PCLK2 by the value of the VB_CLKDIV Register.
The RTC transfers 1 byte of data for one transfer clock.
In one BREAD/BWRITE operation, the RTC transfers data of registers in sequence from BREG00 to
BREG1F.
The RTC starts the transfer from BREG00. The transfer destination or the transfer source is shifted to the
next register whenever one transfer clock elapses.
Since the backup register of the FM4 Family is 32 bytes in size, the data transfer ends as 32 transfer
clocks elapse.
− BWRITE operation waveform
The save data is output from the buffer at a falling edge of the transfer clock and is written to the register
at a rising edge of the transfer clock.
One transfer clock is required for preprocessing before the start of a transfer.
− BREAD operation waveform
The recall data is output from the register at a rising edge of the transfer clock and is written to the buffer
at a falling edge of the transfer clock.
One transfer clock is required for preprocessing before the start of a transfer and one transfer clock is
also required for postprocessing after the end of a transfer.
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