CHAPTER 7-3: VBAT Domain(B)
320 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
The interface circuit type of the VBDIR Register is type 4. The interface circuit type of the other registers
are type 3.
The save operation and recall operation of the 32 kHz oscillation circuit are PWRITE and PREAD
respectively. (register of interface circuit type 3)
Note:
− The settings of the I/O Port Control Registers (PFR4[6:9], PCR4[6:9], DDR4[6:9], DIR4[6:9],
DOR4[6:9], PZR4[6:9]) have no effect on the operations of the VBAT I/O ports.
Initial Settings of VBAT I/O Ports
Table 2-9 shows the respective initial states of the VBAT I/O ports.
Table 2-9 Initial States of VBAT I/O Ports
Initially Selected Function
This pin can be used as an oscillation pin. (The oscillation has stopped.)
The digital input has been cut off and 0 has been input to this pin.
This pin can be used as an oscillation pin. (The oscillation has stopped.)
The digital input has been cut off and 0 has been input to this pin.
This is a digital input pin. The output is open drain.
This is a digital input pin. The output is open drain.
The VBAT I/O ports remain in their respective states described in Table 2-9 while the VBAT power-on
circuit is resetting the VBAT Domain.
Procedure for Setting VBAT I/O Ports
In the case of using 32 kHz oscillation circuit
See 5 Procedure for Setting 32 kHz Clock for different setting procedures.
In the case of controlling hibernation
See 4 Hibernation Control for the setting procedure as well as the procedure for setting I/O.
In the case of using VBAT I/O port as GPIO port
For the setting method, refer to Chapter 12: I/O Port in FM4 Family Peripheral Manual.
(For registers having the same function, substitute an actual register name for the one used in that
chapter.)
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