Cypress FM4 Series - Page 84

CHAPTER 2-2: Clock Gating
84 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Gating Units and their Initial Status of Peripheral Clock
For gating units and their initial states of Peripheral Clock Gating, see Table 1-1.
Table 1-1 Control Units and their Initial Status of Peripheral Clock Gating
Peripheral Functions
Clock Stop Units
Initial States
Remarks
Multi-function Serial Interface
Unit of channel
Clock supply
Base Timer
Unit of four channels
Clock supply
The clock gating can be
controlled with every four
channels ch.0 to ch.3, ch.4
to ch.7, ch.8 to ch.11, and
ch.12 to ch.15.
Multi-function Timer
Unit of unit
Clock supply
PPG
Unit of eight channels
Clock supply
The clock gating can be
controlled with every four
channels ch.0 to ch.7, ch.8
to ch.15, ch.16 to ch.23,
and ch.24 to ch.31.
Quad Counter
Unit of unit
Clock supply
DMAC
Unit of unit
Clock supply
External Bus Interface
Unit of unit
Clock supply
CAN Controller
Unit of channel
Clock supply
USB (Function/Host)
Unit of channel
Clock stop
SD Card Interface
Unit of unit
Clock stop
A/D Converter
Unit of unit
Clock supply
I/O Port
Batch of all ports
Clock supply
For constrains at clock
gating, 5. Peripheral Clock
Gating Function Usage
Precautions.
Programmable-CRC
Unit of unit
Clock supply
I
2
S Interface
Unit of channels
Clock stop
HDMI-CEC/ Remote Control
Reception
Unit of channels
Clock supply
Hi-Speed SPI controller
Unit of unit
Clock stop
MFS I
2
S Interface
Unit of channel
Clock supply
Smart Card Interface
Unit of channel
Clock supply
Notes:
− For types and the number of mounted peripheral functions, see Data sheet of the product used
− The clock control of PPG shares the setting bits with the multi-function timer. For details, see
4.3 Peripheral Clock Control Register 1 (CKEN1).
− For products equipped with Ethernet-MAC, execute the clock control by each unit with Ethernet
System Control Register (ETH_CLKG).
− Execute the clock control of the DSTC unit alone with 5. DSTC Register in DSTC.