MIPS R4000 Microprocessor User's Manual 73
Memory Management
Kernel Mode Operations
The processor operates in Kernel mode when the Status register contains
one of the following values:
• KSU = 00
2
• EXL = 1
• ERL = 1
In conjunction with these bits, the KX bit in the Status register selects
between 32- or 64-bit Kernel mode addressing:
• when KX = 0, 32-bit kernel space is selected and all TLB misses
are handled by the 32-bit TLB refill exception handler
• when KX = 1, 64-bit kernel space is selected and all TLB misses
are handled by the 64-bit XTLB refill exception handler
The processor enters Kernel mode whenever an exception is detected and
it remains in Kernel mode until an Exception Return (ERET) instruction is
executed. The ERET instruction restores the processor to the mode
existing prior to the exception.
Kernel mode virtual address space is divided into regions differentiated
by the high-order bits of the virtual address, as shown in Figure 4-6. Table
4-3 lists the characteristics of the 32-bit kernel mode segments, and Table
4-4 lists the characteristics of the 64-bit kernel mode segments.
To Next Page
Loading...