Mips Technologies R4000 - 8-Word Write Cycle

Chapter 13
386 MIPS R4000 Microprocessor User's Manual
Figure 13-4 Timing Diagram of a 4-Word Write Cycle
8-Word Write Cycle
An 8-word write cycle has one additional parameter beyond those used by
the 4-word write cycle: t
Wr2Dly
. This is the time period that begins when
the low-order address bit SCAddr(0) changes and ends when SCWR* is
asserted for the second time. The lower half of SCData is driven on the
same edge as the change in SCAddr(0).
Figure 13-5 illustrates the 8-word write cycle.
PCycle
1 2 3 4
SCAddr(17:0)
Address
SCData(63:0)/
Data
SCTag(24:0)
Data
Data
SCWR*
t
Wr1Dly
t
WrRc
SCOE*
SCDCS*
SCTCS*
SCData(127:64)/
SCTChk(6:0)/
SCDChk(7:0) or
SCDChk(15:8)
SCData(127:64)/
SCData(63:0)/
SCDChk(15:8) or
SCDChk(7:0)
t
WrSUp
SCAPar(2:0)