MIPS R4000 Microprocessor User's Manual 125
CPU Exception Processing
Soft Reset Exception
Cause
The Soft Reset exception occurs in response to either the Reset* input
signal or a Nonmaskable Interrupt (NMI)
†
.
The NMI is caused either by an assertion of the NMI* signal or an external
write to the Int*[6] bit of the Interrupt register.
This exception is not maskable.
Processing
Regardless of the cause, when this exception occurs the SR bit of the Status
register is set, distinguishing this exception from a Reset exception.
The processor does not indicate any distinction between an exception
caused by the Reset* signal or the NMI* signal.
• An exception caused by an NMI can only be taken if the
processor is processing instructions; it is taken at the
instruction boundary. It does not abort any state machines,
preserving the state of the processor for diagnosis.
• An exception caused by assertion of Reset* performs a subset
of the full reset initialization. After a processor is completely
initialized by a Reset exception (caused by ColdReset* or
Power-On), Reset* can be asserted on the processor in any
state, even if the processor is no longer processing instructions.
In this situation the processor does not read or set processor
configuration parameters. It does, however, initialize all other
processor state that requires hardware initialization (for
instance, the state machines and registers), in order that the
CPU can fetch and execute the Reset exception handler located
in uncached and unmapped space. Although no other
processor state is unnecessarily changed, a soft reset sequence
may be forced to alter some state since the exception can be
invoked arbitrarily on a cycle boundary, and abort any
multicycle operation in progress. Since bus, cache, or other
operations may be interrupted, portions of the cache, memory,
or other processor state may be inconsistent.
† In this book, a Soft Reset exception caused by assertion of the Reset* signal is referred to
as a “soft reset” or “warm reset.” A Soft Reset exception caused by a nonmaskable
interrupt (NMI) is referred to as a “nonmaskable interrupt exception.”
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