Mips Technologies R4000 - Processor Exceptions; Exception Types

MIPS R4000 Microprocessor User's Manual 119
CPU Exception Processing
5.3 Processor Exceptions
This section describes the processor exceptions—it describes the cause of
each exception, its processing by the hardware, and servicing by a handler
(software). The types of exception, with exception processing operations,
are described in the next section.
Exception Types
This section gives sample exception handler operations for the following
exception types:
• reset
• soft reset
• nonmaskable interrupt (NMI)
• cache error
• remaining processor exceptions
When the EXL bit in the Status register is 0, either User, Supervisor, or
Kernel operating mode is specified by the KSU bits in the Status register.
When the EXL bit is a 1, the processor is in Kernel mode.
When the processor takes an exception, the EXL bit is set to 1, which means
the system is in Kernel mode. After saving the appropriate state, the
exception handler typically changes KSU to Kernel mode and resets the
EXL bit back to 0. When restoring the state and restarting, the handler
restores the previous value of the KSU field and sets the EXL bit back to 1.
Returning from an exception, also resets the EXL bit to 0 (see the ERET
instruction in Appendix A).
In the following sections, sample hardware processes for various
exceptions are shown, together with the servicing required by the handler
(software).