MIPS R4000 Microprocessor User's Manual 329
System Interface
12.6 Processor and External Request Protocols
The following sections contain a cycle-by-cycle description of the bus
arbitration protocols for each type of processor and external request.
Table 12-5 lists the abbreviations and definitions for each of the buses that
are used in the timing diagrams that follow.
Table 12-5 System Interface Requests
Scope Abbreviation Meaning
Global Unsd Unused
SysAD bus
Addr Physical address
Data<n> Data element number n of a block of data
SysCmd bus
Cmd An unspecified System interface command
Read A processor or external read request command
RwWF
A processor read-with-write-forthcoming request
command
Write A processor or external write request command
Null A processor null request command
SINull
A System interface release external null request
command
SCNull
A secondary cache release external null request
command
Ivd
A processor or external invalidate request
command
Upd A processor or external update request command
Ivtn An external intervention request command
Snoop An external snoop request command
NData
A noncoherent data identifier for a data element
other than the last data element
NEOD
A noncoherent data identifier for the last data
element
CData
A coherent data identifier for a data element other
than the last data element
CEOD A coherent data identifier for the last data element
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