Chapter 5
138 MIPS R4000 Microprocessor User's Manual
Breakpoint Exception
Cause
A Breakpoint exception occurs when an attempt is made to execute the
BREAK instruction. This exception is not maskable.
Processing
The common exception vector is used for this exception, and the BP code
in the Cause register is set.
The EPC register contains the address of the BREAK instruction unless it
is in a branch delay slot, in which case the EPC register contains the
address of the preceding branch instruction.
If the BREAK instruction is in a branch delay slot, the BD bit of the Status
register is set, otherwise the bit is cleared.
Breakpoint exception processing is shown in Figure 5-17.
Servicing
When the Breakpoint exception occurs, control is transferred to the
applicable system routine. Additional distinctions can be made by
analyzing the unused bits of the BREAK instruction (bits 25:6), and
loading the contents of the instruction whose address the EPC register
contains. A value of 4 must be added to the contents of the EPC register
(EPC register + 4) to locate the instruction if it resides in a branch delay
slot.
To resume execution, the EPC register must be altered so that the BREAK
instruction does not re-execute; this is accomplished by adding a value of
4 to the EPC register (EPC register + 4) before returning.
If a BREAK instruction is in a branch delay slot, interpretation of the
branch instruction is required to resume execution.
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