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Mips Technologies R4000 - No-Secondary-Cache Mode; Secondary-Cache Mode

Mips Technologies R4000
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Chapter 12
320 MIPS R4000 Microprocessor User's Manual
Secondary-Cache Mode
In secondary-cache mode, if the current cache line does not have to be
written back and the coherency attribute for the page that contains the
requested cache line is not exclusive, the processor issues a coherent block
read request for the cache line that contains the data element to be loaded.
If the current cache line needs to be written back and the coherency
attribute for the requested cache line is sharable or update, the processor
issues a cluster. The cluster consists of a coherent block read-with-write-
forthcoming request for the cache line that contains the data element to be
loaded, followed by a block write request for the current cache line.
If the current cache needs to be written back and the coherency attribute
for the page containing the requested cache line is exclusive, the processor
issues a cluster consisting of an exclusive read-with-write-forthcoming
request, followed by a write request for the current cache line.
Table 12-3 lists these actions.
No-Secondary-Cache Mode
In no-secondary-cache mode, if the cache line must be written back on a
load miss, the read request is issued and completed before the write
request is handled. The processor takes the following steps:
1. The processor issues a noncoherent read request
for the cache line
that contains the data element to be loaded.
2. The processor then waits for an external agent to provide the read
response.
If the current cache line must be written back, the processor issues a write
request to save the dirty cache line in memory.
Only noncoherent and uncached attributes are supported in no-secondary-cache mode.

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