MIPS R4000 Microprocessor User's Manual 307
System Interface
Processor Write Request
When a processor issues a write request, the specified resource is accessed
and the data is written to it. (Processor write requests are described in this
section; external write requests are described in External Requests, later on
in this chapter.)
A processor write request is complete after the last word of data has been
transmitted to the external agent.
In secondary-cache mode, the external agent must be capable of accepting
a processor write request any time all three of the following conditions are
met:
• There is no processor read request pending.
• There is no unacknowledged processor update request that is
compulsory.
• The signal WrRdy* has been asserted for two or more cycles.
In no-secondary-cache mode, the external agent must be capable of
accepting a processor write request any time the following two conditions
are met:
• No processor read request is pending.
• The signal WrRdy* has been asserted for two or more cycles.
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