Chapter 1
2 MIPS R4000 Microprocessor User's Manual
In recent years, however, reduced instruction set computer (RISC)
architectures are implementing a different model for the interaction
between hardware, firmware, and software. RISC concepts emerged from
a statistical analysis of the way in which software actually uses processor
resources: dynamic measurement of system kernels and object modules
generated by optimizing compilers showed that the simplest instructions
were used most often—even in the code for CISC machines.
Correspondingly, complex instructions often went unused because their
single way of performing a complex operation rarely matched the precise
needs of a high-level language.
RISC architecture eliminates microcode routines and turns low-level
control of the machine over to software. The RISC approach is not new,
but its application has become more prevalent in recent years, due to the
increasing use of high-level languages, the development of compilers that
are able to optimize at the microcode level, and dramatic advances in
semiconductor memory and packaging. It is now feasible to replace
relatively slow microcode ROM with faster RAM that is organized as an
instruction cache. Machine control resides in this instruction cache that is,
in effect, customized on-the-fly: the instruction stream generated by
system- and compiler-generated code provides a precise fit between the
requirements of high-level software and the low-level capabilities of the
hardware.
Reducing or simplifying the instruction set was not the primary goal of
RISC architecture; it is a pleasant side effect of techniques used to gain the
highest performance possible from available technology. Thus, the term
reduced instruction set computers is a bit misleading; it is the push for
performance that really drives and shapes RISC designs.
1.1 Benefits of RISC Design
Some benefits that result from RISC design techniques are not directly
attributable to the drive to increase performance, but are a result of the
basic reduction in complexity—a simpler design allows both chip-area
resources and human resources to be applied to features that enhance
performance. Some of these benefits are described below.