Chapter 12
338 MIPS R4000 Microprocessor User's Manual
Processor Request and Cluster Flow Control
The external agent uses RdRdy* to control the flow of the following
processes:
• processor read request
• processor invalidate request
• processor update request
• processor read request, followed by a potential update request
within a cluster.
Figures 12-24 through 12-27 illustrate this flow control, as described in the
steps below.
1. The processor samples the signal RdRdy* to determine if the external
agent is capable of accepting a read, invalidate, update request, or a
read request followed by a potential update request.
2. The signal WrRdy* controls the flow of a processor write request.
3. The processor does not complete the issue of a read, invalidate, update
request, or a read request followed by a potential update request, until
it issues an address cycle in response to the request for which the
signal RdRdy* was asserted two cycles earlier.
4. The processor does not complete the issue of a write request until it
issues an address cycle in response to the write request for which the
signal WrRdy* was asserted two cycles earlier.
Figure 12-24 illustrates two processor write requests in which the issue of
the second is delayed for the assertion of WrRdy*.
Figure 12-25 illustrates a processor cluster in which the issue of the read
and a potential update request are delayed for the assertion of RdRdy*.
Figure 12-26 illustrates a processor cluster in which the issue of the write
request is delayed for the assertion of WrRdy*.
Figure 12-27 illustrates the issue of a processor write request delayed for
the assertion of WrRdy* and the completion of an external invalidate
request.
NOTE: Timings for the SysADC and SysCmdP buses are the same as
those of the SysAD and SysCmd buses, respectively.
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