Chapter 14
394 MIPS R4000 Microprocessor User's Manual
Boundary-Scan Register
The Boundary-scan register is a single, 319-bit-wide, shift register-based
path containing cells connected to all input and output pads on the R4000
processor. Figure 14-5 shows the three most-significant bits of the
Boundary-scan register; these three bits control the output enables on the
various bidirectional buses.
Figure 14-5 Output Enable Bits of the Boundary-scan Register
The most-significant bit, OE3 (bit 319), is the JTAG output enable bit for
the SysAD, SysADC, SysCmd, and SysCmdP buses. Output is enabled
when this bit is set to 1.
OE2 (bit 318) is the JTAG output enable for the SCData and SCDChk
buses. Output is enabled when this bit is set to 1.
OE1 (bit 317) is the JTAG output enable for the SCTag and SCTChk buses.
The remaining 316 bits correspond to 316 signal pads of the processor.
Output is enabled when this bit is set to 1.
At the end of this chapter, Table 14-2 lists the scan order of these 316 scan
bits, starting from JTDI and ending with JTDO.
318319 317
OE3
1316
OE2 OE1
See Table 14-2
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