Chapter 12
310 MIPS R4000 Microprocessor User's Manual
Processor Update Request
An update request notifies all processors that a specified cache line in all
caches throughout a multiprocessor system must be replaced with
modified data. An update request can only be used in a multiprocessing
system.
When a processor issues an update request, the specified resource is
accessed and the line is updated. (Processor update requests are described
in this section; external update requests are described in External
Requests, later on in this chapter.)
A processor update request requires a completion acknowledge by either
the invalidate acknowledge signal IvdAck* or the invalidate error signal
IvdErr* (shown in Figure 12-10), unless the update is canceled by the
external agent. A processor update request that has been submitted, but
for which the processor has not yet received an acknowledge or a
cancellation, is said to be unacknowledged. When the processor update
request fails (IvdErr* is asserted), the issuing processor takes a bus error
on the store instruction that generated the failed request. Figure 12-10
shows a sample processor invalidate/update request cycle.
Figure 12-10 Processor Update/Invalidate Acknowledge Cycle
Update cancellation is signaled to the processor during external
invalidate, update, snoop, and intervention requests; IvdErr* signals a
processor update request has failed.
Since a completion acknowledge for processor update requests is signaled
through the System interface on dedicated pins, this acknowledgment can
occur in parallel with processor and external requests.
R4000
External Agent
1. Processor Update or
Invalidate Request
R4000
5. IvdAck* or IvdErr*
System bus
External Agent
2
4
3. External Update
or Invalidate
Request
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