MIPS R4000 Microprocessor User's Manual 309
System Interface
Figure 12-9 Cancelling an Invalidate Request
The steps shown in Figure 12-9 are described below:
1. The processor issues an invalidate on a store hit to a shared line in
its cache.
2. An invalidate request, coming from the system bus, is received by
the processor’s external agent targeting the same cache line.
3. The external invalidate invalidates the cache line, and the
processor invalidate request is cancelled.
4. The processor re-examines the state of the cache line and
discovers the cache line which was target of the store is now
invalid. The processor issues a processor read request to service
the store miss.
R4000
External Agent
1. Processor issues
invalidate request
System bus
2. Invalidate arrives from
the system
3. External invalidate with
cancellation sent to processor
4. Processor issues processor
read request
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