Chapter 6
170 MIPS R4000 Microprocessor User's Manual
Data Alignment
All coprocessor loads and stores reference the following aligned data
items:
• For word loads and stores, the access type is always WORD,
and the low-order 2 bits of the address must always be 0.
• For doubleword loads and stores, the access type is always
DOUBLEWORD, and the low-order 3 bits of the address must
always be 0.
Endianness
Regardless of byte-numbering order (endianness) of the data, the address
specifies the byte that has the smallest byte address in the addressed field.
For a big-endian system, it is the leftmost byte; for a little-endian system,
it is the rightmost byte.
Floating-Point Conversion Instructions
Conversion instructions perform conversions between the various data
formats such as single- or double-precision, fixed- or floating-point
formats. Table 6-10 lists conversion instructions; Appendix B gives a
detailed description of each instruction.
Floating-Point Computational Instructions
Computational instructions perform arithmetic operations on floating-
point values, in registers. Table 6-11 lists the computational instructions
and Appendix B provides a detailed description of each instruction. There
are two categories of computational instructions:
• 3-Operand Register-Type instructions, which perform floating-
point addition, subtraction, multiplication, and division
• 2-Operand Register-Type instructions, which perform floating-
point absolute value, move, negate, and square root operations
Branch on FPU Condition Instructions
Table 6-12 lists the Branch on FPU (coprocessor unit 1) condition
instructions that can test the result of the FPU compare (C.cond)
instructions. Appendix B gives a detailed description of each instruction.
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