MIPS R4000 Microprocessor User's Manual 275
Cache Organization, Operation, and Coherency
Table 11-7 Summary of Coherency Conflicts: Invalidate and Update
Table 11-8 Summary of Coherency Conflicts: Intervention and Snoop
System Implications of Coherency Conflicts
The constraints that the processor must place on the handling of coherency
conflicts have certain implications on the design of a multiprocessor
system using the R4000MC model. These constraints and their
implications are described in this section.
† This can cause incorrect system operation and normally should not be allowed to occur.
† This can cause incorrect system operation and normally should not be allowed to occur.
Processor
State
Conflicting External Coherency Request
Invalidate
Invalidate
with Cancel
Update
Update
with Cancel
Idle NA Undefined NA Undefined
Read Pending OK Undefined OK Undefined
Potential Update Unacknowledged OK Undefined OK Undefined
Invalidate or Update
Unacknowledged
OK
†
OK OK
†
OK
Processor
State
Conflicting External Coherency Request
Intervention
Intervention
with Cancel
Snoop
Snoop
with Cancel
Idle NA Undefined NA Undefined
Read Pending OK Undefined OK Undefined
Potential Update
Unacknowledged
OK Undefined OK Undefined
Invalidate or Update
Unacknowledged
OK
†
OK OK
†
OK
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