Chapter 14
392 MIPS R4000 Microprocessor User's Manual
14.3 JTAG Controller and Registers
The processor contains the following JTAG controller and registers:
• Instruction register
• Boundary-scan register
• Bypass register
• Test Access Port (TAP) controller
The processor executes the standard JTAG EXTEST operation associated
with External Test functionality testing.
Instruction Register
The JTAG Instruction register includes three shift register-based cells; this
register is used to select the test to be performed and/or the test data
register to be accessed. As listed in Table 14-1, this encoding selects either
the Boundary-scan register or the Bypass register.
Table 14-1 JTAG Instruction Register Bit Encoding
The Instruction register has two stages:
• shift register
• parallel output latch
Figure 14-3 shows the format of the Instruction register.
Figure 14-3 Instruction Register
MSB. . . . . LSB Data Register
0 0 0 Boundary-scan register (external test only)
x x 1 Bypass register
x 1 x Bypass register
1 x x Bypass register
MSB
LSB
120
To Next Page
Loading...